SIMD·NEON 활용 — 128-bit Vector·Auto-Vectorization·SVE/SVE2

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void scale(float *a, float k, int N) {
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    for (int i = 0; i < N; i++) {
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        a[i] *= k;
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    }
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}

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// 회피
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void add(float *a, float *b, float *c, int N) {
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    for (int i = 0; i < N; i++) c[i] = a[i] + b[i];
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    // 컴파일러: a와 c가 alias할 수도 → vector 못 함
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}
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// Good
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void add(float * restrict a, float * restrict b, float * restrict c, int N) {
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    for (int i = 0; i < N; i++) c[i] = a[i] + b[i];
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}

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#include <arm_neon.h>
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void add_neon(float *a, float *b, float *c, int N) {
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    int i;
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    for (i = 0; i + 4 <= N; i += 4) {
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        float32x4_t va = vld1q_f32(&a[i]);
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        float32x4_t vb = vld1q_f32(&b[i]);
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        float32x4_t vc = vaddq_f32(va, vb);
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        vst1q_f32(&c[i], vc);
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    }
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    /* Tail */
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    for (; i < N; i++) c[i] = a[i] + b[i];
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}

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float dot(const float *a, const float *b, int N) {
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    float32x4_t sum = vdupq_n_f32(0.0f);
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    int i;
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    for (i = 0; i + 4 <= N; i += 4) {
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        float32x4_t va = vld1q_f32(&a[i]);
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        float32x4_t vb = vld1q_f32(&b[i]);
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        sum = vfmaq_f32(sum, va, vb);   // sum += a * b
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    }
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    /* Horizontal sum */
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    float32x2_t h = vadd_f32(vget_low_f32(sum), vget_high_f32(sum));
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    h = vpadd_f32(h, h);
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    float result = vget_lane_f32(h, 0);
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    for (; i < N; i++) result += a[i] * b[i];
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    return result;
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}

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#include <arm_mve.h>
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void add_mve(int16_t *a, int16_t *b, int16_t *c, int N) {
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    for (int i = 0; i < N; i += 8) {
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        int16x8_t va = vld1q(&a[i]);
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        int16x8_t vb = vld1q(&b[i]);
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        int16x8_t vc = vaddq(va, vb);
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        vst1q(&c[i], vc);
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    }
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}

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#include <arm_sve.h>
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void add_sve(float *a, float *b, float *c, int N) {
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    int i = 0;
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    svbool_t pg = svwhilelt_b32(i, N);
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    while (svptest_first(svptrue_b32(), pg)) {
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        svfloat32_t va = svld1(pg, &a[i]);
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        svfloat32_t vb = svld1(pg, &b[i]);
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        svst1(pg, &c[i], svadd_z(pg, va, vb));
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        i += svcntw();
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        pg = svwhilelt_b32(i, N);
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    }
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}

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// Scalar
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for (i = 0; i < N; i++) c[i] = a[i] + b[i];
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// → 1 add per cycle (Cortex-M)
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// NEON
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float32x4_t va = vld1q_f32(...);
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// → 4 add per cycle
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// 이론 4x — 실측 3.2-3.8x (load/store가 병목)

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// 회피 — RAW chain
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float sum = 0;
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for (i = 0; i < N; i++) sum += a[i];   // 1 add/cycle (RAW)
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// Good — 4-way reduction
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float32x4_t acc0 = vdupq_n_f32(0);
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float32x4_t acc1 = vdupq_n_f32(0);
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float32x4_t acc2 = vdupq_n_f32(0);
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float32x4_t acc3 = vdupq_n_f32(0);
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for (i = 0; i + 16 <= N; i += 16) {
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    acc0 = vaddq_f32(acc0, vld1q_f32(&a[i]));
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    acc1 = vaddq_f32(acc1, vld1q_f32(&a[i+4]));
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    acc2 = vaddq_f32(acc2, vld1q_f32(&a[i+8]));
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    acc3 = vaddq_f32(acc3, vld1q_f32(&a[i+12]));
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}
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/* 16-way ILP — load + add latency 가림 */

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__attribute__((aligned(16))) float a[1024];
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float32x4_t v = vld1q_f32(a);   // ← aligned load 빠름

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for (i = 0; i < N; i += 4) {   // N=10이면 i=8까지 → tail 2 남음
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    process_4(arr + i);
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}

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int16_t a[N]; float b[N];
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for (i) b[i] = (float)a[i] * 2.0f;   // ← conversion 비쌈