Cache Line 최적화 — Alignment·Prefetch·False Sharing 처리

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#define CACHE_LINE_SIZE 64
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#if defined(__cpp_lib_hardware_interference_size)
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#include <new>
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constexpr size_t CACHE_LINE = std::hardware_destructive_interference_size;
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#endif

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__attribute__((aligned(64))) struct hot_data {
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    uint32_t counter;
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    uint32_t flag;
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};
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// 또는 C11
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alignas(64) uint32_t buffer[256];
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// 또는 C++11
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alignas(64) struct Foo { ... };

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__attribute__((aligned(64))) static int matrix[1024][1024];

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// 회피 — 두 atomic이 같은 line
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struct counters {
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    atomic_int producer_count;
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    atomic_int consumer_count;
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};
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// Good — line 분리
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struct counters {
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    alignas(64) atomic_int producer_count;
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    alignas(64) atomic_int consumer_count;
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};

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// 회피 — 자주 / 드물게 쓰는 field 섞임
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struct guest {
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    int id;
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    int active;
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    char address[256];        // 드물게 사용
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    char email[128];          // 드물게
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    int last_login;           // hot
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};
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// Good — hot/cold 분리
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struct guest_hot {
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    int id;
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    int active;
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    int last_login;
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};
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struct guest_cold {
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    char address[256];
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    char email[128];
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};

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// AoS — Array of Structures
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struct particle { float x, y, z, vx, vy, vz, mass; } parts[N];
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for (i = 0; i < N; i++) {
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    parts[i].x += parts[i].vx * dt;   // x, vx만 사용, y/z/mass도 fetch됨
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}
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// SoA — Structure of Arrays
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struct {
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    float x[N], y[N], z[N];
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    float vx[N], vy[N], vz[N];
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    float mass[N];
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} parts_soa;
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for (i = 0; i < N; i++) {
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    parts_soa.x[i] += parts_soa.vx[i] * dt;   // x, vx만 fetch
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}

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for (i = 0; i < N; i++) {
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    __builtin_prefetch(&data[i + 8], 0 /* read */, 0 /* no temp */);
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    process(data[i]);
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}

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pld [r0, #64]    ; preload data
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pldw [r0, #64]   ; preload data for write
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pli [r0, #64]    ; preload instruction

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SCB->CCR |= SCB_CCR_BP_Msk;   // Branch prediction enable
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// Cortex-M7 prefetch는 자동 (instruction은)

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for (i = 0; i < N; i++) {
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    arr[i] = compute(i);   // 한 번 쓰고 안 읽음 — cache 입력 의미 없음
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}

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__builtin_nontemporal_store(value, &arr[i]);

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struct spsc_queue {
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    alignas(64) atomic_size_t head;   // producer만 쓰는 line
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    char pad1[64 - sizeof(atomic_size_t)];
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    alignas(64) atomic_size_t tail;   // consumer만 쓰는 line
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    char pad2[64 - sizeof(atomic_size_t)];
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    alignas(64) T data[CAPACITY];
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};

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/* Cortex-M7 + DMA receive */
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uint8_t dma_buf[256] __attribute__((aligned(32)));
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HAL_UART_Receive_DMA(&huart, dma_buf, 256);
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/* DMA wrote to memory, CPU cache는 stale */
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SCB_InvalidateDCache_by_Addr((uint32_t*)dma_buf, 256);
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/* 이제 CPU read시 fresh data */
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process(dma_buf);

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/* DMA transmit — CPU writes to buf */
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fill_data(dma_buf);
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SCB_CleanDCache_by_Addr((uint32_t*)dma_buf, 256);   // flush cache → memory
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HAL_UART_Transmit_DMA(&huart, dma_buf, 256);

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__attribute__((hot)) void critical_function(void) { ... }
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__attribute__((cold)) void error_handler(void) { ... }

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struct {
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    char flag;       // 1 byte
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    int value;       // 4 byte — offset 1? 또는 4 (padding)?
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    char name[3];
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} thing;             // → 12 byte? sizeof 확인

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__builtin_prefetch(&arr[i + 1]);   // 너무 가까움 — 효과 없음
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__builtin_prefetch(&arr[i + 1000]); // 너무 멈 — evict 가능

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volatile struct { alignas(64) int a; alignas(64) int b; } v;