타이밍·Race 진단 — Heisenbug 잡는 법

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volatile uint8_t rx_buf[256];
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volatile uint16_t head, tail;
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void USART1_IRQHandler(void) {
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    uint8_t b = USART1->DR;
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    rx_buf[head] = b;
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    head = (head + 1) & 0xFF;   /* head 갱신 */
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}
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uint8_t ring_pop(void) {
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    while (head == tail) ;       /* wait for data */
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    uint8_t b = rx_buf[tail];
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    tail = (tail + 1) & 0xFF;
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    return b;
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}

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uint8_t ring_pop(void) {
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    while (head == tail) ;
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    printf("h=%d t=%d\n", head, tail);   /* 디버깅 추가 */
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    /* ... */
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}

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[가설 A] head 갱신이 atomic하지 않음
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  → STM32 16-bit aligned uint16_t write는 atomic. 기각.
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[가설 B] tail update 시점에 ISR이 끼어 ring 깨짐
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  → 가능. 측정 필요.
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[가설 C] DMA가 ring을 같이 쓰는데 sync 안 됨
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  → 코드 상 DMA 없음. 기각.

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void USART1_IRQHandler(void) {
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    GPIOC->BSRR = GPIO_PIN_0;       /* PC0 = ISR */
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    uint8_t b = USART1->DR;
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    rx_buf[head] = b;
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    head = (head + 1) & 0xFF;
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    GPIOC->BSRR = GPIO_PIN_0 << 16;
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}
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uint8_t ring_pop(void) {
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    GPIOC->BSRR = GPIO_PIN_1;       /* PC1 = main critical */
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    while (head == tail) ;
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    uint8_t b = rx_buf[tail];
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    tail = (tail + 1) & 0xFF;
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    GPIOC->BSRR = GPIO_PIN_1 << 16;
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    return b;
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}

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uint32_t cyc_isr_in, cyc_isr_out;
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void USART1_IRQHandler(void) {
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    cyc_isr_in = DWT->CYCCNT;
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    /* ... */
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    cyc_isr_out = DWT->CYCCNT;
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}
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void show_race(void) {
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    uint32_t isr_start_offset = cyc_isr_in - cyc_main_section_start;
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    printf("isr at +%lu cyc (in main section)\n", isr_start_offset);
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}

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ITM_SendChar('I');   /* ISR enter */
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/* ... */
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ITM_SendChar('M');   /* main critical */

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head = (head + 1) & 0xFF;

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while (head == tail) ;    /* head 갱신 보기 위해 volatile 필요 */

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volatile uint16_t head;
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while (head == tail) ;     /* volatile → 매번 reload */

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uint32_t shared_counter;
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void TIM2_IRQHandler(void) {
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    shared_counter++;
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}
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void main_task(void) {
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    if (shared_counter > 100) {
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        shared_counter = 0;        /* read·zero 사이 ISR 끼면 +1 사라짐 */
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        do_action();
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    }
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}

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__disable_irq();
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uint32_t snap = shared_counter;
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shared_counter = 0;
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__enable_irq();
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if (snap > 100) do_action();

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g_command_args[0] = 0x1234;
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g_command_args[1] = 0x5678;
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g_command_ready   = 1;       /* ← peripheral·ISR가 이걸 먼저 볼 가능성 */

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g_command_args[0] = 0x1234;
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g_command_args[1] = 0x5678;
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__DMB();                     /* memory barrier */
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g_command_ready   = 1;

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if (g_buf_free)
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    g_buf_free = 0;          /* 다른 task와 race */

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/* Cortex-M0+ 이상은 LDREX/STREX 지원 */
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do {
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    if (__LDREXW(&g_buf_free) == 0) {
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        __CLREX();
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        return -EBUSY;
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    }
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} while (__STREXW(0, &g_buf_free) != 0);

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mutex_lock(&m);
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shared.x = 1;
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shared.y = 2;
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mutex_unlock(&m);

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/* Ring buffer in RAM. Producer is ISR / main. Consumer dumps later. */
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struct trace_event {
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    uint32_t cyc;        /* DWT CYCCNT */
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    uint8_t  src;        /* ISR id or main */
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    uint8_t  evt;        /* enter/exit/data */
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    uint16_t arg;
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};
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#define TRACE_N 256
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static volatile struct trace_event g_trace[TRACE_N];
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static volatile uint16_t g_idx;
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static inline void trace_log(uint8_t src, uint8_t evt, uint16_t arg) {
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    uint16_t i = g_idx++ & (TRACE_N - 1);
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    g_trace[i].cyc = DWT->CYCCNT;
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    g_trace[i].src = src;
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    g_trace[i].evt = evt;
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    g_trace[i].arg = arg;
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}

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void trace_dump(void) {
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    for (int i = 0; i < TRACE_N; i++) {
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        printf("[%lu] src=%u evt=%u arg=0x%x\n",
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               g_trace[i].cyc, g_trace[i].src, g_trace[i].evt, g_trace[i].arg);
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    }
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}

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uint32_t g_flag;       /* ← volatile 아님 */
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while (!g_flag) ;      /* 컴파일러가 무한 루프로 최적화 */

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volatile uint64_t big = 0;
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big = some_value;      /* 32-bit MCU에서 *두 번의 write* — atomic 아님 */

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__disable_irq();
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HAL_Delay(10);          /* SysTick IRQ 누락 → 시간 안 감 → 무한 대기 */
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__enable_irq();

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do_x();
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printf("debug\n");   /* ← race window를 메우고 있을 뿐 */
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do_y();