Ethernet MAC+PHY 통합 — RMII·lwIP·DMA Descriptor

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REF_CLK  ←── 50 MHz reference (oscillator 또는 MCO)
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CRS_DV   ←── carrier sense / data valid
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RXD[1:0] ←── 2-bit RX data
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TXEN     ──→ TX enable
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TXD[1:0] ──→ 2-bit TX data

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#define PHY_ADDR  0x00
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static uint16_t mdio_read(uint8_t reg) {
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    ETH->MACMIIAR = (PHY_ADDR << 11) | (reg << 6) | ETH_MACMIIAR_MB | (4 << 2);
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    while (ETH->MACMIIAR & ETH_MACMIIAR_MB);
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    return ETH->MACMIIDR;
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}
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static void mdio_write(uint8_t reg, uint16_t val) {
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    ETH->MACMIIDR = val;
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    ETH->MACMIIAR = (PHY_ADDR << 11) | (reg << 6) | ETH_MACMIIAR_MW | ETH_MACMIIAR_MB | (4 << 2);
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    while (ETH->MACMIIAR & ETH_MACMIIAR_MB);
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}
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void phy_init(void) {
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    mdio_write(0, 0x8000);   // reset
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    while (mdio_read(0) & 0x8000);
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    mdio_write(0, 0x1200);   // auto-neg + restart
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    // wait link up
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    while (!(mdio_read(1) & 0x0004));   // BMSR.LINK
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}
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int phy_get_speed_duplex(int *speed_mbps, int *full_duplex) {
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    uint16_t scsr = mdio_read(31);   // PHYSCSR
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    int code = (scsr >> 2) & 0x7;
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    switch (code) {
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        case 1: *speed_mbps = 10;  *full_duplex = 0; break;
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        case 2: *speed_mbps = 100; *full_duplex = 0; break;
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        case 5: *speed_mbps = 10;  *full_duplex = 1; break;
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        case 6: *speed_mbps = 100; *full_duplex = 1; break;
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        default: return -1;
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    }
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    return 0;
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}

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void eth_init(uint8_t mac[6]) {
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    RCC->AHB1ENR |= RCC_AHB1ENR_ETHMACEN
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                  | RCC_AHB1ENR_ETHMACTXEN
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                  | RCC_AHB1ENR_ETHMACRXEN;
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    RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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    SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;     // RMII mode
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    // GPIO setup (PA1, PA2, PA7, PB11, PB13, PC1, PC4, PC5 — AF11)
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    // ...
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    // MAC reset
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    ETH->DMABMR |= ETH_DMABMR_SR;
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    while (ETH->DMABMR & ETH_DMABMR_SR);
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    // MAC config
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    ETH->MACCR = ETH_MACCR_FES | ETH_MACCR_DM    // 100 Mbps full
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               | ETH_MACCR_IPCO;
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    ETH->MACA0HR = (mac[5] << 8) | mac[4];
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    ETH->MACA0LR = (mac[3] << 24) | (mac[2] << 16) | (mac[1] << 8) | mac[0];
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    // Setup DMA descriptors (TX/RX rings)
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    setup_dma_rings();
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    ETH->MACCR |= ETH_MACCR_TE | ETH_MACCR_RE;   // TX/RX enable
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    ETH->DMAOMR |= ETH_DMAOMR_FTF;
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    ETH->DMAOMR |= ETH_DMAOMR_ST | ETH_DMAOMR_SR;
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}

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#include "lwip/init.h"
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#include "lwip/tcpip.h"
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#include "lwip/dhcp.h"
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#include "lwip/udp.h"
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static struct netif gnetif;
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static struct udp_pcb *echo_pcb;
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void udp_echo_recv(void *arg, struct udp_pcb *upcb,
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                   struct pbuf *p, const ip_addr_t *addr, u16_t port) {
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    udp_sendto(upcb, p, addr, port);
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    pbuf_free(p);
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}
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void net_init(void) {
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    lwip_init();
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    ip_addr_t ip, netmask, gw;
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    IP4_ADDR(&ip, 0, 0, 0, 0);
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    IP4_ADDR(&netmask, 0, 0, 0, 0);
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    IP4_ADDR(&gw, 0, 0, 0, 0);
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    netif_add(&gnetif, &ip, &netmask, &gw, NULL,
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              ethernetif_init,             // 사용자가 작성
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              netif_input);
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    netif_set_default(&gnetif);
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    netif_set_up(&gnetif);
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    dhcp_start(&gnetif);
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    echo_pcb = udp_new();
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    udp_bind(echo_pcb, IP_ADDR_ANY, 5000);
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    udp_recv(echo_pcb, udp_echo_recv, NULL);
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}
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// main loop
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while (1) {
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    ethernetif_input(&gnetif);   // poll RX
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    sys_check_timeouts();
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}

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#include "lwip/apps/httpd.h"
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void web_init(void) {
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    httpd_init();
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}

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void net_poll_link(void) {
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    static int prev_link = -1;
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    int link = !!(mdio_read(1) & 0x0004);
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    if (link != prev_link) {
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        if (link) {
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            int spd, dup;
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            phy_get_speed_duplex(&spd, &dup);
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            printf("Link up: %d Mbps %s\n", spd, dup ? "full" : "half");
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            netif_set_link_up(&gnetif);
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        } else {
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            printf("Link down\n");
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            netif_set_link_down(&gnetif);
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        }
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        prev_link = link;
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    }
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}