MMIO 레지스터 직접 접근 — volatile·Memory Map·Aliasing 분석

1
volatile uint32_t *p = (volatile uint32_t *)0x40020014;
2

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*p = 0x20;   // 이 write를 제거하지 않는다
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x = *p;      // 이 read를 제거·합치지 않는다
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*p = 0x20;   // 같은 값이라도 생략하지 않는다

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// 원본
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uint32_t *gpio = (uint32_t *)0x40020014;
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*gpio = 0x20;   // ON
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*gpio = 0x00;   // OFF
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// -O2 컴파일 결과 (volatile 없으면)
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// 둘 다 dead store로 판단 → 첫 줄 제거
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*gpio = 0x00;

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typedef struct {
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    volatile uint32_t MODER;     // 0x00
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    volatile uint32_t OTYPER;    // 0x04
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    volatile uint32_t OSPEEDR;   // 0x08
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    volatile uint32_t PUPDR;     // 0x0C
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    volatile uint32_t IDR;       // 0x10
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    volatile uint32_t ODR;       // 0x14
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    volatile uint32_t BSRR;      // 0x18
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    volatile uint32_t LCKR;      // 0x1C
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    volatile uint32_t AFR[2];    // 0x20, 0x24
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} GPIO_TypeDef;
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#define GPIOA  ((GPIO_TypeDef *)0x40020000)
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GPIOA->MODER = 0x01 << 10;

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// peripheral clock enable 직후 access 패턴
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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__DSB();   // Data Synchronization Barrier
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GPIOA->MODER = ...;

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#define GPIOA_BASE     0x40020000UL
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#define GPIOA_MODER    (*(volatile uint32_t *)(GPIOA_BASE + 0x00))
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#define GPIOA_ODR      (*(volatile uint32_t *)(GPIOA_BASE + 0x14))
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#define GPIOA_BSRR     (*(volatile uint32_t *)(GPIOA_BASE + 0x18))
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GPIOA_MODER |= (1u << 10);   // PA5 output
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GPIOA_BSRR  =  (1u << 5);    // PA5 set (atomic)
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GPIOA_BSRR  =  (1u << 21);   // PA5 reset (BSRR upper 16-bit)

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typedef struct {
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    volatile uint32_t MODER;
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    volatile uint32_t OTYPER;
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    volatile uint32_t OSPEEDR;
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    volatile uint32_t PUPDR;
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    volatile uint32_t IDR;
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    volatile uint32_t ODR;
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    volatile uint32_t BSRR;
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} GPIO_TypeDef;
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#define GPIOA  ((GPIO_TypeDef *)0x40020000)
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void led_init(void) {
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    GPIOA->MODER &= ~(3u << (5 * 2));
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    GPIOA->MODER |=  (1u << (5 * 2));
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}
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void led_on(void)  { GPIOA->BSRR = (1u << 5); }
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void led_off(void) { GPIOA->BSRR = (1u << 21); }

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// 위험 — bit-field 레이아웃은 implementation-defined
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typedef struct {
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    volatile uint32_t pin0_mode : 2;
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    volatile uint32_t pin1_mode : 2;
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} GPIO_MODER_t;

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// 위험 — 두 ISR이 동시에 GPIOA->ODR을 토글하면 race
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GPIOA->ODR ^= (1u << 5);
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// 안전 — BSRR을 쓰면 atomic
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GPIOA->BSRR = (1u << 5);    // set
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GPIOA->BSRR = (1u << 21);   // reset
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// 안전 — ODR을 토글하려면 critical section
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__disable_irq();
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GPIOA->ODR ^= (1u << 5);
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__enable_irq();

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; volatile 있을 때
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ldr  r3, [pc, #16]   ; r3 = &GPIOA_ODR
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movs r2, #32         ; r2 = 0x20
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str  r2, [r3]        ; *GPIOA_ODR = 0x20
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movs r2, #0          ; r2 = 0
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str  r2, [r3]        ; *GPIOA_ODR = 0   ← 두 store 모두 살아 있음
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; volatile 없을 때 (-O2)
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ldr  r3, [pc, #12]
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movs r2, #0
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str  r2, [r3]        ; 두 번째 store만 남음

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// 잘못
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uint32_t *p = (uint32_t *)0x40020014;
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*p = 0x20;
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5
// 옳음
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volatile uint32_t *p = (volatile uint32_t *)0x40020014;
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*p = 0x20;

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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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// __DSB();  ← 안전을 위해 권장
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GPIOA->MODER = ...;